Logic IC

502 Logic IC chips — pinouts, specs, and datasheets.

74AC165 · Texas Instruments

The 74AC165 is an 8-bit parallel-input shift register that can be loaded in parallel or shifted serially, with a wide operating voltage range and high output drive capability.

74AC240 · Texas Instruments

The 74AC240 is an octal buffer with inverted outputs, providing input and output enable functionality.

74AC241 · Texas Instruments

The SN74AC241 is an octal buffer with 3-state outputs, designed for memory address drivers and bus-oriented receivers/transmitters.

74AC244 · Texas Instruments

The 74AC244 is an octal buffer or driver with 3-state outputs, designed for memory address drivers and bus-oriented receivers/transmitters.

74AC245 · Texas Instruments

The SN54AC245 is an octal bus transceiver designed for asynchronous two-way communication between data buses, with features including direction control and output enable.

74AC32 · Texas Instruments

The 74AC32 is a quad OR gate IC that performs the Boolean function Y = A + B or Y = A × B in positive logic.

74AC373 · Texas Instruments

The 74AC373 is an octal D-type transparent latch with 3-state outputs designed for parallel data access and bidirectional bus driving.

74AC374 · Texas Instruments

The 74AC374 is an octal D flip-flop with 3-state outputs designed for driving bus lines directly and implementing buffer registers or I/O ports.

74AC541 · Texas Instruments

The SN74AC541 is an octal buffer with 3-state outputs, used for driving or redriving digital signals and holding them during controller resets.

74AC573 · Texas Instruments

The SN74AC573 is an octal D-type transparent latch with 3-state outputs, used for buffer registers and bidirectional bus drivers.

74AC574 · Texas Instruments

The SN54AC574 is an octal D flip-flop with 3-state outputs designed for use in buffer registers, I/O ports, bidirectional bus drivers, and working registers.

74AC595 · Texas Instruments

The SN74AC595 is an 8-bit shift register with 3-state outputs, used for output expansion and LED matrix control.

74AC74 · Texas Instruments

The 74AC74 is a dual D-type flip-flop with clear and preset inputs, used for data storage and toggling applications.

74AC86 · Texas Instruments

The 74AC86 is a quad XOR gate that performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic, with inputs and outputs for four channels.

74AHC00 · Texas Instruments

The 74AHC00 is a quad NAND gate IC that performs the Boolean function Y = A • B or Y = A + B in positive logic.

74AHC02 · Texas Instruments

The SN74AHC02 is a quad NOR gate IC that performs the Boolean function Y = A ● B or Y = A + B in positive logic.

74AHC04 · Texas Instruments

The 74AHC04 Hex Inverter is a digital logic device that contains six independent inverters, performing the Boolean function Y = A. It operates within an input voltage range of 2V to 5.5V and has various package options including PDIP, SOIC, SSOP, LCCC, TSSOP, VQFN, and WQFN.

74AHC05 · Texas Instruments

The SN74AHC05 is a hex inverter with open-drain outputs, used for digital signal inversion and logic operations.

74AHC08 · Texas Instruments

The SN74AHC08 is a quad 2-input positive-AND gate IC, designed for digital logic applications with low drive and slow rise/fall times to reduce output ringing.

74AHC125 · Texas Instruments

The 74AHC125 is a quad bus buffer with 3-state outputs, used in applications like flow meters and programmable logic controllers.

74AHC126 · Texas Instruments

The SN74AHC126 is a quad bus buffer with 3-state outputs designed to drive and disable digital signals. It operates over an input voltage range of 0V to 5.5V and has low delay characteristics.

74AHC132 · Texas Instruments

The SN74AHC132 is a quad Schmitt NAND gate designed for digital signal processing with noise immunity and temperature-compensated thresholds.

74AHC138 · Texas Instruments

The SN74AHC138 is a 3-to-8 line decoder/demultiplexer with three enable inputs and eight outputs.

74AHC139 · Texas Instruments

The SN74AHC139 is a dual 2-to-4 decoder designed for high-speed memory decoding and data routing applications, with two enable inputs per channel to simplify cascading or demultiplexing.