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IDE 40-pin Pinout

Parallel ATA (PATA) 40-pin ribbon-cable interface for hard drives and optical drives.

Overview

The 40-pin IDE/PATA connector is the classic dual-row header (two rows of 20 on 2.54 mm pitch) used by parallel ATA drives. It carries a 16-bit data bus, three address lines, ATA read/write strobes, DMA handshaking and control signals.

Pin 20 is the keying position (removed). The later 80-conductor cable keeps the same 40-pin connector but interleaves a ground between every signal for UDMA, with pin 34 used to detect the 80-conductor cable.

Pinout

PinNameFunctionDescription
1-RESETSIGNALDrive reset, active low
2GNDGNDGround
3DD7DATAData bus bit 7
4DD8DATAData bus bit 8
5DD6DATAData bus bit 6
6DD9DATAData bus bit 9
7DD5DATAData bus bit 5
8DD10DATAData bus bit 10
9DD4DATAData bus bit 4
10DD11DATAData bus bit 11
11DD3DATAData bus bit 3
12DD12DATAData bus bit 12
13DD2DATAData bus bit 2
14DD13DATAData bus bit 13
15DD1DATAData bus bit 1
16DD14DATAData bus bit 14
17DD0DATAData bus bit 0
18DD15DATAData bus bit 15
19GNDGNDGround
20KEYSIGNALKeying position (pin removed)
21DMARQSIGNALDMA request
22GNDGNDGround
23-DIOW / STOPSIGNALWrite strobe (Ultra DMA: STOP)
24GNDGNDGround
25-DIORSIGNALRead strobe / Ultra DMA ready
26GNDGNDGround
27IORDYSIGNALI/O channel ready / Ultra DMA ready
28CSELVIDEOCable select / spindle sync
29-DMACKSIGNALDMA acknowledge
30GNDGNDGround
31INTRQSIGNALInterrupt request
32-IOCS16SIGNAL16-bit I/O (obsolete in ATA-3+)
33DA1SIGNALAddress bit 1
34-PDIAG / CBLIDSIGNALPassed diagnostics / 80-conductor cable detect
35DA0SIGNALAddress bit 0
36DA2SIGNALAddress bit 2
37-CS0SPIChip select for command-block registers
38-CS1SPIChip select for control-block registers
39-DASPSIGNALDrive active / slave present (LED driver)
40GNDGNDGround

Notes

  • Pin 20 is keyed (no pin) for orientation.
  • Some control pins take Ultra DMA dual functions.
  • The 44-pin 2.5-inch variant adds power pins beyond these 40.

Reference: ATA/ATAPI (PATA) 40-pin interface pinout· verified 2026-06-27