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Quad Clocked "D" Latch
4042
ic logic
The CD4042B is a quad CMOS clocked 'D' latch with high-voltage ratings, designed for digital logic applications.
In stock
Specifications
5- Operating Voltage Range
- -0.5 V to +20 V (referenced to VSS) V
- Supply Voltage Range
- 3 V to 18 V V
- Clock Pulse Width
- 5 ns, 10 ns, 15 ns (min) ns
- Setup Time
- 5 ns, 10 ns, 15 ns (min) ns
- Hold Time
- 5 ns, 10 ns, 15 ns (min) ns
Pinout
12| Pin | Name | Functions | Notes |
|---|---|---|---|
| D1 | Data Input 1 | GPIO | Input to the first latch circuit |
| D2 | Data Input 2 | GPIO | Input to the second latch circuit |
| D3 | Data Input 3 | GPIO | Input to the third latch circuit |
| D4 | Data Input 4 | GPIO | Input to the fourth latch circuit |
| Q1 | Output Q1 | GPIO | Complementary output from first latch |
| Q2 | Output Q2 | GPIO | Complementary output from second latch |
| Q3 | Output Q3 | GPIO | Complementary output from third latch |
| Q4 | Output Q4 | GPIO | Complementary output from fourth latch |
| CL | Clock Input | GPIO | Input for clock signal to all latches |
| POLARITY | Polarity Control | GPIO | Determines latch transfer timing during clock transition |
| VDD | Supply Voltage | POWER | Power supply voltage |
| VSS | Ground | GND | Ground reference |
Interactive pinout
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4042
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