← All parts
74F125 Quad Bus Buffer (3-state)
74F125
Texas Instrumentsic logic
The SN74F125 is a quad bus buffer with 3-state outputs used for driving or buffering bus lines and memory address registers.
In stock
Specifications
7- Operating Voltage
- –0.5 V to 7 V (VI), 4.5 V to 5.5 V (VCC)
- Supply Current
- -30 mA to 5 mA
- Interface
- GPIO
- Range
- –1.2 V to 7 V (VI)
- Accuracy
- -30 mA to 5 mA (Input current range)
- Temperature Range
- -65°C to 150°C
- Package
- PDIP, SOIC, SOP
Pinout
14| Pin | Name | Functions | Notes |
|---|---|---|---|
| 1 | OE1 | GPIO | Output enable for buffer 1 |
| 2 | A1 | GPIO | Input for buffer 1 |
| 3 | Y1 | GPIO | Output for buffer 1 |
| 4 | OE2 | GPIO | Output enable for buffer 2 |
| 5 | A2 | GPIO | Input for buffer 2 |
| 6 | Y2 | GPIO | Output for buffer 2 |
| 7 | OE3 | GPIO | Output enable for buffer 3 |
| 8 | A3 | GPIO | Input for buffer 3 |
| 9 | Y3 | GPIO | Output for buffer 3 |
| 10 | OE4 | GPIO | Output enable for buffer 4 |
| 11 | A4 | GPIO | Input for buffer 4 |
| 12 | Y4 | GPIO | Output for buffer 4 |
| 13 | GND | GND | Ground |
| 14 | VCC | POWER | Supply voltage |
Interactive pinout
Highlight:
74F125
Click a pin to copy its name · tap a tag above to spotlight a bus.