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74F126 Quad Bus Buffer
74F126
Texas Instrumentsic logic
The SN74F126 is a quadruple bus buffer gate with 3-state outputs, designed for driving bus lines or memory address registers. It operates in a voltage range of 4.5V to 5.5V.
In stock
Specifications
3- Operating Voltage Range
- 4.5V to 5.5V V
- Package
- D, N, or NS package (top view)
- Max Tpd At 5V
- 6.5 ns ns
Pinout
14| Pin | Name | Functions | Notes |
|---|---|---|---|
| 1 | OE | GPIO | Output enable |
| 2 | A | GPIO | Input A |
| 3 | 1Y | GPIO | Output 1 |
| 4 | 2OE | GPIO | Output enable for output 2 |
| 5 | 2A | GPIO | Input A for output 2 |
| 6 | 2Y | GPIO | Output 2 |
| 7 | GND | GND | Ground |
| 8 | 3A | GPIO | Input A for output 3 |
| 9 | 3OE | GPIO | Output enable for output 3 |
| 10 | 3Y | GPIO | Output 3 |
| 11 | 4OE | GPIO | Output enable for output 4 |
| 12 | 4A | GPIO | Input A for output 4 |
| 13 | 4Y | GPIO | Output 4 |
| 14 | VCC | POWER | Supply voltage |
Interactive pinout
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74F126
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