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74HC74 Dual D Flip-Flop
SN74HC74
Texas Instrumentsic logic
The 74HC74 holds two independent positive-edge-triggered D-type flip-flops, each with asynchronous active-low preset and clear and complementary Q/Q outputs. It runs from 2V to 6V.
In stock
Specifications
10- Logic Function
- Dual D-type positive-edge-triggered flip-flop with preset and clear
- Operating Voltage
- 2 to 6 V
- Operating Temperature Range
- -40 to 85 C
- Supply Current Max
- 40 uA
- Input Current Max
- 1 uA
- Output Current Continuous
- 25 mA
- Clock Frequency Max
- 29 MHz
- Propagation Delay Max At 4 5v
- 44 ns
- Input Capacitance Max
- 10 pF
- Package Types
- SOIC-14, SSOP-14, PDIP-14, SO-14, TSSOP-14, CDIP-14, CFP-14, LCCC-20
Pinout
14| Pin | Name | Functions | Notes |
|---|---|---|---|
| 1 | 1CLR | GPIO | Channel 1, clear input, active low |
| 2 | 1D | GPIO | Channel 1, data input |
| 3 | 1CLK | GPIO | Channel 1, positive-edge triggered clock input |
| 4 | 1PRE | GPIO | Channel 1, preset input, active low |
| 5 | 1Q | GPIO | Channel 1, output |
| 6 | 1Q | GPIO | Channel 1, inverted output |
| 7 | GND | GND | Ground |
| 8 | 2Q | GPIO | Channel 2, inverted output |
| 9 | 2Q | GPIO | Channel 2, output |
| 10 | 2PRE | GPIO | Channel 2, preset input, active low |
| 11 | 2CLK | GPIO | Channel 2, positive-edge triggered clock input |
| 12 | 2D | GPIO | Channel 2, data input |
| 13 | 2CLR | GPIO | Channel 2, clear input, active low |
| 14 | VCC | POWER | Positive supply |
Interactive pinout
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SN74HC74
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