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74LS92 Divide-by-12 Counter
74LS92
Texas Instrumentsic logic
The SN74LS90DR is a divide-by-12 counter IC designed for digital signal processing applications.
In stock
Specifications
2- Operating Voltage
- 0 to 70 V Volts
- Package Type
- SOIC (D) Dimensions in mm
Pinout
14| Pin | Name | Functions | Notes |
|---|---|---|---|
| 1 | VCC | POWER | Power supply input |
| 2 | S0 | GPIO | Input for clock division selection |
| 3 | S1 | GPIO | Input for clock division selection |
| 4 | S2 | GPIO | Input for clock division selection |
| 5 | Q1 | GPIO | Output of the first stage counter |
| 6 | Q2 | GPIO | Output of the second stage counter |
| 7 | Q3 | GPIO | Output of the third stage counter |
| 8 | Q4 | GPIO | Output of the fourth stage counter |
| 9 | Q5 | GPIO | Output of the fifth stage counter |
| 10 | Q6 | GPIO | Output of the sixth stage counter |
| 11 | Q7 | GPIO | Output of the seventh stage counter |
| 12 | Q8 | GPIO | Output of the eighth stage counter |
| 13 | Q9 | GPIO | Output of the ninth stage counter |
| 14 | GND | GND | Ground reference point |
Interactive pinout
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74LS92
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