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74LV165 8-bit Shift Register
74LV165
Texas Instrumentsic logic
The SN74LV165A is an 8-bit shift register designed for parallel-load operations with a supply voltage range of 2V to 5.5V.
In stock
Specifications
8- Operating Voltage
- 2V to 5.5V
- Supply Current
- 20µA (static)
- Interface
- Serial, Parallel
- Resolution
- 8-bit
- Range
- 0V to VCC for outputs; 0V to 5.5V for inputs
- Accuracy
- N/A
- Temperature Range
- -40°C to 125°C (operating)
- Package
- D, DB, NS, PW, DGV, RGY, BQB
Pinout
13| Pin | Name | Functions | Notes |
|---|---|---|---|
| SH/LD | Shift/Load Input | GPIO | Controls the shift or load operation. |
| CLK | Clock Input | GPIO | Provides the clock signal for shifting data. |
| CLK INH | Clock Inhibit Input | GPIO | Inhibits the clock input during specific operations. |
| A | Serial Input A | GPIO | Receives serial data for shifting into the register. |
| B | Serial Input B | GPIO | Receives serial data for shifting into the register. |
| C | Serial Input C | GPIO | Receives serial data for shifting into the register. |
| D | Serial Input D | GPIO | Receives serial data for shifting into the register. |
| E | Serial Input E | GPIO | Receives serial data for shifting into the register. |
| F | Serial Input F | GPIO | Receives serial data for shifting into the register. |
| G | Serial Input G | GPIO | Receives serial data for shifting into the register. |
| H | Serial Input H | GPIO | Receives serial data for shifting into the register. |
| QH | Output H, Inverted | GPIO | Provides inverted output of the last bit shifted in. |
| QH | Output H | GPIO | Provides non-inverted output of the last bit shifted in. |
Interactive pinout
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74LV165
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