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74LV240 Octal Buffer (inv)
74LV240
Texas Instrumentsic logic
The SN74LV240 is an octal inverting buffer designed for 2V to 5.5V operation, used for memory address drivers and bus-oriented receivers/transmitters.
In stock
Specifications
8- Operating Voltage
- 2 to 5.5 V
- Supply Current
- 20 µA
- Interface
- CMOS
- Resolution
- N/A
- Range
- 2 to 5.5 V
- Accuracy
- N/A
- Temperature Range
- -40°C to 125°C
- Package
- DGV (TVSOP, 20), DB (SSOP, 20), DW (SOIC, 20), NS (SOP, 20), PW (TSSOP, 20)
Pinout
20| Pin | Name | Functions | Notes |
|---|---|---|---|
| 1 | OE1 | GPIO | Output enable 1 |
| 2 | A1 | GPIO | Input 1A1 |
| 3 | Y4 | GPIO | Output 2Y4 (inverted) |
| 4 | A2 | GPIO | Input 1A2 |
| 5 | Y3 | GPIO | Output 2Y3 (inverted) |
| 6 | A3 | GPIO | Input 1A3 |
| 7 | Y2 | GPIO | Output 2Y2 (inverted) |
| 8 | A4 | GPIO | Input 1A4 |
| 9 | Y1 | GPIO | Output 2Y1 (inverted) |
| 10 | GND | GND | Ground |
| 11 | A5 | GPIO | Input 2A1 |
| 12 | Y8 | GPIO | Output 1Y4 (inverted) |
| 13 | A6 | GPIO | Input 2A2 |
| 14 | Y7 | GPIO | Output 1Y3 (inverted) |
| 15 | A7 | GPIO | Input 2A3 |
| 16 | Y6 | GPIO | Output 1Y2 (inverted) |
| 17 | A8 | GPIO | Input 2A4 |
| 18 | Y5 | GPIO | Output 1Y1 (inverted) |
| 19 | OE2 | GPIO | Output enable 2 |
| 20 | VCC | POWER | Power supply |
Interactive pinout
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74LV240
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