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CMOS Quad 2-Input NAND Schmitt Triggers
CMOS Quad 2-Input NAND Schmitt Triggers
ic
The CD4093B is a CMOS quad 2-input NAND gate with Schmitt trigger action, suitable for applications requiring high noise immunity and wave shaping.
In stock
Specifications
2- Operating Voltage Range
- 3 to 18 V Volts
- Package Type
- 14-lead dual-in-line ceramic, plastic, small outline packages.
Pinout
14| Pin | Name | Functions | Notes |
|---|---|---|---|
| 1 | A | GPIO | Input to the first of four two-input NAND gates. |
| 2 | B | GPIO | Input to the second of four two-input NAND gates. |
| 3 | J | GPIO | Output from the first gate, connected internally for Schmitt trigger action. |
| 4 | K | GPIO | Input to the third of four two-input NAND gates. |
| 5 | C | GPIO | Output from the second gate, connected internally for Schmitt trigger action. |
| 6 | D | GPIO | Input to the fourth of four two-input NAND gates. |
| 7 | VSS | GND | Ground reference for the device. |
| 8 | H | GPIO | Output from the third gate, connected internally for Schmitt trigger action. |
| 9 | L | GPIO | Input to the fifth of four two-input NAND gates (not shown). |
| 10 | M | GPIO | Output from the fourth gate, connected internally for Schmitt trigger action. |
| 11 | F | GPIO | Input to the sixth of four two-input NAND gates (not shown). |
| 12 | E | GPIO | Output from the fifth gate, connected internally for Schmitt trigger action. |
| 13 | G | GPIO | Input to the seventh of four two-input NAND gates (not shown). |
| 14 | VDD | POWER | Supply voltage for the device. |
Interactive pinout
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CMOS Quad 2-Input NAND Schmitt Triggers
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