W5100

Interface — Ethernet/CAN/serial

W5100 is a full-featured, single-chip Ethernet controller supporting TCP/IP protocols and multiple sockets for embedded applications.

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Specifications

Pin	Name	Functions	Notes
59	/RESET	GPIO	Active low input to initialize or re-initialize W5100.
38-49, 52-54	ADDR14-0	GPIO	Used to select a register or memory address.
19-26	DATA7-0	GPIO	Used for reading and writing data to registers or memory.
55	/CS	SPIGPIO	Chip select for MCU access to internal registers or memory. Active low.
56	/INT	GPIO	Indicates W5100 requires MCU attention after socket operations. Active low.
57	/WR	SPIGPIO	Strobe for writing to internal registers/memory selected by ADDR[14:0]. Active low.
58	/RD	SPIGPIO	Strobe for reading from internal registers/memory selected by ADDR[14:0]. Active low.
31	SEN	SPIGPIO	Selects SPI mode enable/disable. Low = Disable, High = Enable.
30	SCLK	SPI	SPI clock signal pin.
29	/SCS	SPIGPIO	SPI slave select, active low.
28	MOSI	SPI	SPI master out slave in signal pin.
27	MISO	SPI	SPI master in slave out signal pin.

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W5100

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