Logic IC
502 Logic IC chips — pinouts, specs, and datasheets.
74HC366 · Nexperia
The 74HC366 is a hex inverting buffer/line driver with 3-state outputs, designed for CMOS logic levels and featuring input clamp diodes.
74HC368 · Texas Instruments
The SN54HC368 is a hex buffer/inverter IC with 16 pins, designed for digital signal processing and interfacing. It supports various logic levels and can be used in applications requiring level shifting or buffering.
74HC390 · Nexperia
The 74HC390 is a dual decade ripple counter that can operate in BCD or bi-quinary configurations, featuring asynchronous master reset and separate clock inputs for each section.
74HC573 · Nexperia
The 74HC573 is an octal D-type transparent latch with 3-state outputs, used for latching and storing data in digital circuits.
74HC597 · Nexperia
The 74HC597 is an 8-bit shift register with input flip-flops, used for serial-to-parallel data conversion and storage.
74HC85 · Nexperia
The 74HC85 is a 4-bit magnitude comparator that compares two binary, BCD or monotonic codes and outputs the result of comparison.
74HCT00 · Texas Instruments
The SN54HCT00 and SN74HCT00 are quad-NAND gates with high-speed CMOS technology, offering four independent channels for digital logic operations.
74HCT02 Quad NOR
74HCT02 · Texas Instruments
The SN54HCT02 and SN74HCT02 are quad NOR gates with high-speed CMOS logic. They feature four independent NOR gates, each capable of performing logical operations on two inputs.
74HCT03 · Nexperia
The 74HCT03 is a quad 2-input NAND gate IC with open-drain outputs, designed for use in digital logic circuits.
74HCT04 · Texas Instruments
The SN54HCT04 and SN74HCT04 are hex inverter ICs designed for digital logic applications, featuring six independent inverters per chip.
74HCT08 Quad AND
74HCT08 · Texas Instruments
The SN74HCT08 is a quad 2-input positive AND gate IC, performing the Boolean function Y = A • B in positive logic.
74HCT10 · Nexperia
The 74HCT10 is a triple 3-input NAND gate IC used for digital logic operations, with inputs and outputs designed for TTL level signals.
74HCT107 · Nexperia
The 74HCT107 is a dual negative-edge triggered JK flip-flop with reset, featuring individual J and K inputs, clock (CP) and reset (R) inputs, and complementary Q and Q' outputs.
74HCT109 · Nexperia
The 74HCT109 is a dual JK flip-flop with set and reset, featuring positive-edge triggering.
74HCT11 · Nexperia
The 74HCT11 is a triple 3-input AND gate designed for CMOS logic levels, with wide supply voltage range and high noise immunity.
74HCT112 · Nexperia
The 74HCT112 is a dual negative-edge triggered JK flip-flop designed for use in digital circuits, featuring asynchronous set and reset inputs.
74HCT123 · Nexperia
The 74HCT123 is a dual retriggerable monostable multivibrator with reset, used for generating output pulses of programmable width based on external components.
74HCT125 · Texas Instruments
The 74HCT125 is a quad bus buffer with 3-state outputs, designed to drive up to 15 LSTTL loads and operate within an input voltage range of 0V to VCC.
74HCT126 · Nexperia
The 74HCT126 is a quad buffer/line driver with 3-state outputs that can be enabled or disabled by an output enable input. It operates over a wide supply voltage range and has low power dissipation, high noise immunity, and ESD protection.
74HCT132 · Nexperia
The 74HCT132 is a quad 2-input NAND Schmitt trigger IC, used for wave and pulse shaping in digital circuits.
74HCT138 · Texas Instruments
The SN54HCT138 is a 3-to-8 decoder IC with 20 pins, providing digital output for each of its eight outputs.
74HCT139 · Texas Instruments
The SN54HCT139 is a dual 2-line to 4-line decoder IC with active-low enable and fully buffered inputs, suitable for demultiplexing applications.
74HCT14 · Texas Instruments
The 74HCT14 is a hex Schmitt trigger inverter that converts input signals into clean, stable output signals with high noise immunity and fast switching times.
74HCT151 · Nexperia
The 74HCT151 is an 8-to-1 multiplexer with three select inputs and one enable input, routing one of eight binary inputs to complementary outputs.