DRV8302 3-Phase Pre-Driver

Name: DRV8302 3-Phase Pre-Driver
Brand: Texas Instruments

DRV8302

Texas Instrumentsic motor driver

The DRV8302 is a three-phase gate driver for brushless motor control with integrated buck converter and current shunt amplifiers.

Manufacturer datasheet

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Specifications

Operating Voltage: 8-60 V
Supply Current: not specified
Interface: GPIO, PWM
Resolution: not applicable
Range: not specified
Accuracy: not specified
Temperature Range: -40-125°C
Package: HTSSOP (56)

Pinout

Pin	Name	Functions	Notes
1	RT_CLK	GPIO	Resistor timing and external clock for buck regulator
2	COMP	GPIO	Buck error amplifier output and input to the output switch current comparator
3	VSENSE	GPIO	Buck output voltage sense pin. Inverting node of error amplifier.
4	PWRGD	GPIO	An open drain output with external pullup resistor required
5	nOCTW	GPIO	Overcurrent and overtemperature warning indicator. Open drain with external pullup.
6	nFAULT	GPIO	Fault report indicator. Open drain with external pullup.
7	DTC	GPIO	Dead-time adjustment with external resistor to GND
8	M_PWM	GPIO	Mode selection pin for PWM input configuration. If M_PWM = LOW, 6 independent PWM inputs; if HIGH, only 3 PWM inputs internally generated.
9	M_OC	GPIO	Mode selection pin for over-current protection options. If M_OC = LOW, cycle-by-cycle current limiting mode; if HIGH, channel shutdown on overcurrent event.
10	GAIN	GPIO	Gain selection for integrated current shunt amplifiers. LOW: 10V/V, HIGH: 40V/V
11	OC_ADJ	GPIO	Overcurrent trip set pin with recommended voltage divider from DVDD
12	DC_CAL	GPIO	When high, shorts inputs of shunt amplifiers and disconnects loads for DC offset calibration.
13	GVDD	POWER	Internal gate driver voltage regulator
14	CP1	GPIO	Charge pump pin 1, ceramic cap between CP1 and CP2 required.
15	CP2	GPIO	Charge pump pin 2, ceramic cap between CP1 and CP2 required.
16	EN_GATE	GPIO	Enable gate driver and current shunt amplifiers. Controls buck via EN_BUCK pin.
17	INH_A	PWM	High-side PWM input signal for half-bridge A
18	INL_A	PWM	Low-side PWM input signal for half-bridge A
19	INH_B	PWM	High-side PWM input signal for half-bridge B
20	INL_B	PWM	Low-side PWM input signal for half-bridge B
21	INH_C	PWM	High-side PWM input signal for half-bridge C
22	INL_C	PWM	Low-side PWM input signal for half-bridge C
23	DVDD	POWER	Internal 3.3-V supply voltage, not specified to drive external circuitry.
24	REF	GPIO	Reference voltage for setting output of shunt amplifiers with a bias voltage equal to half the reference voltage. Connect to ADC reference in microcontroller.
25	SO1	GPIO	Output of current amplifier 1
26	SO2	GPIO	Output of current amplifier 2
27	AVDD	POWER	Internal 6-V supply voltage, not specified to drive external circuitry.
28	AGND	GND	Analog ground pin
29	PVDD1	POWER	Power supply for gate driver and current shunt amplifier, independent of buck power supply PVDD2.
30	SP2	GPIO	Input to current amplifier 2 (positive input). Connect to ground side of sense resistor for best common mode rejection.
31	SN2	GPIO	Input to current amplifier 2 (negative input)
32	SP1	GPIO	Input to current amplifier 1 (positive input). Connect to ground side of sense resistor for best common mode rejection.
33	SN1	GPIO	Input to current amplifier 1 (negative input)
34	SL_C	GPIO	Low-side MOSFET source connection for half-bridge C. Low-side VDS measured between this pin and SH_C.
35	GL_C	PWM	Gate drive output for low-side MOSFET, half-bridge C
36	SH_C	GPIO	High-side MOSFET source connection for half-bridge C. High-side VDS measured between this pin and PVDD1.
37	GH_C	PWM	Gate drive output for high-side MOSFET, half-bridge C
38	BST_C	POWER	Bootstrap cap pin for half-bridge C
39	SL_B	GPIO	Low-side MOSFET source connection for half-bridge B. Low-side VDS measured between this pin and SH_B.
40	GL_B	PWM	Gate drive output for low-side MOSFET, half-bridge B
41	SH_B	GPIO	High-side MOSFET source connection for half-bridge B. High-side VDS measured between this pin and PVDD1.
42	GH_B	PWM	Gate drive output for high-side MOSFET, half-bridge B
43	BST_B	POWER	Bootstrap cap pin for half-bridge B
44	SL_A	GPIO	Low-side MOSFET source connection for half-bridge A. Low-side VDS measured between this pin and SH_A.
45	GL_A	PWM	Gate drive output for low-side MOSFET, half-bridge A
46	SH_A	GPIO	High-side MOSFET source connection for half-bridge A. High-side VDS measured between this pin and PVDD1.
47	GH_A	PWM	Gate drive output for high-side MOSFET, half-bridge A
48	BST_A	POWER	Bootstrap cap pin for half-bridge A
49	BIAS	GPIO	Bias pin. Connect 1MΩ resistor to GND or 0.1µF capacitor to GND.
50, 51	PH	PWM	The source of the internal high-side MOSFET of buck converter
52	BST_BK	POWER	Bootstrap cap pin for buck converter
53, 54	PVDD2	POWER	Power supply pin for buck converter. PVDD2 cap should connect to GND.
55	EN_BUCK	GPIO	Enable buck converter. Internal pullup current source. Pull below 1.2V to disable, float to enable. Adjust input undervoltage lockout with two resistors.
56	SS_TR	GPIO	Buck soft-start and tracking. External capacitor connected sets output rise time. Voltage on this pin overrides internal reference for tracking and sequencing. Cap should connect to GND.
57	GND (PWR_PAD)	GND	GND pin, must be electrically connected to ground plane through soldering on PCB for proper operation and connected to bottom side of PCB through vias for better thermal spreading.

Interactive pinout

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