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DRV8313 3-Phase Motor Driver
DRV8313
Texas Instrumentsic motor driver
The DRV8313 is a 3-phase motor driver IC designed for brushless DC motors and solenoids, providing up to 2.5-A peak current drive per channel.
In stock
Specifications
8- Operating Voltage
- 8-60 V
- Supply Current
- 10 mA (V3P3) (max)
- Interface
- GPIO, PWM
- Resolution
- Not specified
- Range
- 8-60 V (VM) (operating supply voltage)
- Accuracy
- Not specified
- Temperature Range
- -40 to 125°C (TA) (operating ambient temperature)
- Package
- 28-Pin HTSSOP, 36-Pin VQFN
Pinout
16| Pin | Name | Functions | Notes |
|---|---|---|---|
| EN1 | Channel enable (1) | GPIO | Logic high enables the 1/2-H bridge channel; internal pulldown. |
| IN1 | Channel input (1) | GPIO | Logic high pulls 1/2-H bridge high, logic low pulls 1/2-H bridge low; no effect when ENx is low; internal pulldown input. |
| OUT1 | Half-H bridge output (1) | GPIO | Connect to the load. |
| PGND1 | Low-side FET source (1) | POWER | Connect to GND or to low-side current-sense resistors. |
| EN2 | Channel enable (3) | GPIO | Logic high enables the 1/2-H bridge channel; internal pulldown. |
| IN2 | Channel input (3) | GPIO | Logic high pulls 1/2-H bridge high, logic low pulls 1/2-H bridge low; no effect when ENx is low; internal pulldown input. |
| OUT2 | Half-H bridge output (3) | GPIO | Connect to the load. |
| PGND2 | Low-side FET source (3) | POWER | Connect to GND or to low-side current-sense resistors. |
| EN3 | Channel enable (5) | GPIO | Logic high enables the 1/2-H bridge channel; internal pulldown. |
| IN3 | Channel input (5) | GPIO | Logic high pulls 1/2-H bridge high, logic low pulls 1/2-H bridge low; no effect when ENx is low; internal pulldown input. |
| OUT3 | Half-H bridge output (5) | GPIO | Connect to the load. |
| PGND3 | Low-side FET source (5) | POWER | Connect to GND or to low-side current-sense resistors. |
| nSLEEP | Sleep mode input | GPIO | Logic high to enable device; logic low to enter low-power sleep mode; internal pulldown. |
| V3P3 | Internal regulator (25) | POWER | Internal supply voltage, bypass to GND with a 6.3-V, 0.47-µF ceramic capacitor; up to 10-mA external load. |
| nRESET | Reset input (26) | GPIO | Active-low reset input initializes internal logic, clears faults, and disables the outputs, internal pulldown. |
| nFAULT | Fault indication pin (28) | GPIO | Pulled logic-low with fault condition; open-drain output requires an external pullup. |
Interactive pinout
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DRV8313
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